With the evolution of advanced integrated chip (IC) fabrication technology, number of components and complexity of circuitry disposed on a chip are increasing, and the System-on-Chip (SoC) solution is therefore feasible. Also the operating voltages supplied to SoC chips are decreased to lower levels gradually, in order to achieve a more competitive product specification. When the required power consumption remains substantially unchanged, the reduction of operating voltage has made it difficult to guarantee the stability of output voltages of SoC chips, especially when drawing a large operating current. The instability of output voltages caused by a large operating current drawn by the chip is an over current event. A systematic solution for preventing the over current event is required in the field.